[PDF格式]Zynq™   Evaluation and Development 原理图PCB [复制链接]

MicroZed_RevB_Layout_130617_0.PDF (2759 K) 下载次数:8 MicroZed_RevB_Schematic_130617_0.pdf (1197 K) 下载次数:14 }.j<kmd  
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The features provided by the MicroZed consist of:   99GzhX_  
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•  Xilinx Zynq 7010/7020 CLG400 AP SOC -0Ws3  
o  Primary configuration = QSPI Flash N3J T[7  
o  Auxiliary configuration options R#D>m8&}3  
  JTAG (through PL via Xilinx PC4 Header) _!vxX]  
  microSD Card x
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•  Memory ~ ZkSYW<  
o  1 GB DDR3 (x32) ;ps0wswX  
o  128 Mb QSPI Flash   1N8:,bpsT  
o  4 GB microSD Card (Evaluation Kit only, AES-Z7MB-7Z010-G) 6V[ce4a%  
•  Interfaces I_QWdxn  
o  Xilinx PC4 Header for programming ??X3teO{  
  Accesses Programmable Logic (PL) JTAG [SnnOqWw  
  Processing System (PS) JTAG pins connected through Digilent Pmod™ Z/Vb_  
compatible interface ~"eQPTd  
o  10/100/1000 Ethernet   [(*ObvEF  
o  USB Host 2.0 I.C,y\  
o  microSD Card ]
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o  USB 2.0 Full-Speed USB-UART bridge ;nzzt~aCC  
o  One Digilent Pmod compatible interface, connected to PS MIO UbWeE,T~S  
o  Two 100-pin MicroHeaders hn$l<8=Q_  
o  Reset Button e}F1ZJz  
o  1 User Push Button `$kKTc:f  
o  1 User LEDs itH` s<E  
o  DONE LED \=3fO(  
•  On-board Oscillator )GbVgYkk  
o  33.333 MHz hv]}b'M$  
•  Power BQ[,(T`+R  
o  High-efficiency regulators for Vccint, Vccpint, Vccbram, Vccaux, Vccpaux, Vccpll, &:]ej6V'[  
Vcco_0, Vcco_ddr, Vcco_mio m+jW+  
o  Three potential powering methods |sG@Ku7~4  
  USB Bus Power from USB-UART interface y{Fq'w!ap  
  Optional barrel jack and AC/DC supply ,WvCslZ  
  Optional carrier card

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谢谢分享

    

学习学习!!!   CT@JNG$<"  

好东西，谢谢了。。

好芯片啊，就是能玩转的人少啊，ARM linux fpga 和硬件 缺一不可。。

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