[IC]k4b4g1646b_rev10-1 [复制链接]

4Gb B-die DDR3 SDRAM 6^]|  
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Key Features; ja_8n["z  
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• JEDEC standard 1.5V(1.425V~1.575V) R}=5:)%w  
• VDDQ = 1.5V(1.425V~1.575V) Kt_oo[ey{  
• 400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for 1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin, 933MHz fCK for 1866Mb/sec/pin, 1066 MHz fCK for 2133Mb/sec/pin ResU5Ce~  
• 8 Banks MJ)lZ!KZ  
• Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,12,13,14 aDNB~CwZZ  
• Programmable Additive Latency: 0, CL-2 or CL-1 clock vAUt~X"  
• Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-1333) , 8 (DDR3-1600), 9 (DDR3-1866) and 10 (DDR3-2133) ljNwt  
• 8-bit pre-fetch %f1%9YH  
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either On the fly using A12 or MRS] z5fE<=<X_W  
• Bi-directional Differential Data-Strobe f)/Z7*Z  
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%) Zok{ndO@|f  
• On Die Termination using ODT pin fkzSX8a9}  
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C k <oB9J  
• Support Industrial Temp ( -40 ∼ 85°C ) BkB>eE1)Ea  
• Asynchronous Reset =*,SD
 
• Package : 96 balls FBGA - x16 'K,\
  
• All of Lead-Free products are compliant for RoHS q`<:CfCt  
• All of products are Halogen-free u-TT;k'  
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