Assigning constraints to your design allows you to easily control and verify @Z
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critical design areas. Constraint types include clearance, routing, and high-speed C.yQ=\U2
rules that can be assigned to nets, layers, classes (collection of nets), groups uAJx.>$b
(collection of pin pairs), or individual pin pairs. You can also assign a default set 6+|do+0Icg
of design rules that apply to all objects not having a unique rule. 9igiZmM
In this lesson: m)t;9J5
Ÿ Setting default clearance rules +>{2*\cZ5}
Ÿ Setting net clearance rules ,{u
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Ÿ Setting conditional rules Oi'5ytsES
Restriction y<|7z99L
This tutorial requires the Advanced Rules (for the Conditional Rules section) and 3vN_p$
General Editing licensing options. VU(v3^1"
To determine whether you can proceed: %KhI>O<
Ÿ On the Help menu, click Installed Options. gjwn7_
Preparation vXf!G`D
If it is not already running, start PADS Layout and open the file named JN-y)L/>
previewnet.pcb found in the \PADS Projects\Samples folder. H?vdr:WlTN
Setting Default Clearance Rules EzM
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You can define clearance, routing, and high-speed rules for each level of the ZF9z~9
design rule hierarchy. t;}|tgC
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Setting default clearance rules $aDVG})
The Clearance area of the Clearance Rules dialog box contains a matrix of PCB Cazocq5
design data. You can specify values for each or all data types in the matrix. 9k'7832u
1. Setup menu > Design Rules > Default button. #uG%j
2. Clearance button. WYm\)@
3. Click All (in the upper-left corner of the Clearance matrix) to set a global S]e|"n~@
default clearance value. )Xz,j9GzJS
4. In the Input Clearance Value dialog box, type 8 and click OK. eCDev}
5. In the Trace Width area, type 6 in the Minimum box, type 8 in the >=I|xY,
Recommended box, and type 12 in the Maximum box. _ @NL;w:!
6. Type 12 in the Same Net and Other clearance text boxes, with the exception 7Jyy z,!5
of Trace to Crn box. Set this box to 0. ]___M
7. Click OK. A@!qv#'
Set default routing rules b.JuI
To avoid routing on the plane layers, remove them from the Selected routing )
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layers as defined in the routing rules. The Layer Biasing area of the Routing DZ'P@f)]
Rules dialog box contains a list of selected routing layers. This list lets you Ha0M)0Anv
specify which layers are permitted for routing. S}m)OmrmA
1. Routing button. taHJ u b
2. In the Layer biasing area, in the Selected Layers list, select the Ground %op**@4/t\
Plane, press and hold Ctrl and click Power Plane to add them to the selection. 1y@i}<9F
3. Click Remove to prevent routing on the plane layers. Xv5wJlc!d
4. Click OK to close the Routing Rules dialog box. {Qf=G|Ah
5. Click Close to close the Default Rules dialog box. ]3],r ?-tJ
Setting net clearance rules p?%y82E
You can assign net-specific clearances that take precedence over the default wj$<t'MN
rules previously entered. 8`B3;Zmm
1. Net button. 36&e.3/#
2. Scroll through the Nets list. Ctrl+click to select +5V, +12V, and GND. The B:yGS*.tu
three selected nets appear beside Selected, under the rule type buttons. hB]Np1('
3. Click the Clearance button to set the same clearance rules for all three nets. @su^0 9n
4. In the Clearance Rules dialog box, click All (in the upper-left corner of the O'p9u@kc
matrix) to set a global clearance value. ios&n)W&
5. In the Input Clearance Value dialog box, type 10 as the global clearance and $kdB |4C
then click OK. a8e6H30Sm
6. In the Trace Width area, type 10 in the Minimum box, type 12 in the ed{ -/l~j
Recommended box, and type 15 in the Maximum box. r,8 [O
7. To complete the definition, click OK in the Clearance Rules dialog box. >-RQ]?^
8. Click Close to close the Net Rules dialog box. 4<w.8rR:A
See also: PADS Layout Help for details about defining other Hierarchy rules. +<Nn~1
Setting conditional rules zOAd~E
When two nets require a specific clearance between each other (to avoid adverse
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effects on the circuitry), you must define a conditional rule. An example of a ojm @t
conditional rule might be the Underwriters Laboratories (UL) requirements of Ytp(aE:
segregating primary, secondary, and ground nets when alternating current is Wq D4YGN
directly connected to the PCB. You can assign conditional rules between most HTv2#
components of the design rule hierarchy. Conditional rules can exist between }z'8Bu
nets, nets and classes, classes and pin pairs, nets on a specific layer, and so on. PfAgM1
To assign a net-to-net conditional rule: p}z<Fdu0
1. Conditional Rules button. b4%??"&<Y
2. In the Source Rule Object area, click Nets. 1Z/(G1
Result: A list of nets appears in the Source Rule Object list. J\}twYty
3. Select net +5V. ,B*EVN
4. In the Against Rule Object area, click Nets. gS!:+G%
Result: A list of nets appears in the Against Rule Object list. Fj 8z
5. Select net +12V. oz\!V*CtK
6. Click Create to define the conditional rule. The new rule appears in the wv>^0\o
Existing Rule Sets area. ]NQfX[
7. In the Current Rule Set area, type 25 in the Object to Object box. xjUT{iwS
8. Close all of the open dialog boxes. g{]0sn#
Result: The rule you just created will keep all objects pertaining to the +5V Y#ap*
and +12V nets 25 mils apart. ?um;s-x)
9. Do not save a copy of the design. [r\Du|R-*
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