小碎步灬 发表于 2020-1-17 16:44:40

Cadence导出网表出现的问题，求解决


原理图DRC无问题，导出网络表出现的错误


Loading...F:\PROJECT\SSCBS1000V1.50\04-SCH-SSCBS1000V1.50\ALLEGRO/pstchip.dat
#34 WARNING(SPCODD-34): Expected ';' character on line 1083. Check the name andvalue syntax for invalid characters in the primitive definition before the linenumber.
            ERROR(SPCODD-47): Packagingcan not complete because the file F:/PROJECT/SSCBS1000V1.50/04-SCH-SSCBS1000V1.50/ALLEGRO/pstchip.datcould not be loaded. There might be syntax errors in this file. Ensure that thesyntax is correct before proceeding.
#53 ERROR(SPCODD-53): Packaging cannot be completed because packaging hasencountered a null object ID. The design may not have been saved correctly.Save the design before packaging.
#137 ERROR(ORCAP-36026): Unable to read logical netlist data.

学电子设计 发表于 2020-1-24 08:30:50

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bidinghong 发表于 2020-1-25 08:59:49

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cat200 发表于 2020-2-2 18:13:28

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小碎步灬 发表于 2020-3-4 10:35:04

此问题已解决

我是沙雕 发表于 2020-3-4 21:09:20

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