Power Distribution System (PDS) Design!

2dmin

Introduction:
   FPGA designers are faced with a unique task when it comes to designing power distribution+ ?$ E0 [4 r' x# ]" p' C0 |
systems (PDS). Most other large, dense ICs (such as large microprocessors) come with very
specific bypass capacitor requirements. Since these devices are only designed to implement+ V. _2 j+ ]) n
specific tasks in their hard silicon, their power supply demands are fixed and only fluctuated! t5 p# Y& g2 F) b. E4 ^4 g
within a certain range. FPGAs do not share this property. Since FPGAs can implement an; S# Q4 o) J|+ v
almost infinite number of applications at undetermined frequencies and in multiple clock
domains, it can be very complicated to predict what their transient current demands will be.7 C; p2 g( O! l
Since exact transient current behavior cannot be known for a new FPGA design, the only1 F8 I5 O. a" V* z6 {* C
choice when designing the first version of an FPGA PDS is to go with a conservative worstcase
design.
Transient current demands in digital devices are the cause of ground bounce, the bane of highspeed
digital designs. In low-noise or high-power situations, the power supply decouplingC/ l6 n6 k9 |% q, X
network must be tailored very closely to these transient current needs, otherwise ground$ A5 v& L& V9 l" N
bounce and power supply noise will exceed the limits of the device. The transient currents in an
FPGA are different from design to design. This application note provides a comprehensive# V/ V- K$ o7 L+ c8 l& y1 l% e
method for designing a bypassing network to suit the individual needs of a specific FPGA1 s: d" Y' U5 X' m
design.& b: E8 ?- N# y7 Q1 n% u
The first step in this process is to examine the utilization of the FPGA to get a rough idea of its, B/ C& s- f2 U- P' `8 h( l( `0 P
transient current requirements. Next, a conservative decoupling network is designed to fit these
requirements. The third step is to refine the network through simulation and modification of
capacitor numbers and values. In the fourth step, the full design is built and in the fifth step it is4 p& g/ {7 X' E; m- FW) ~7 l( h: \: R
measured. Measurements are made consisting of oscilloscope and possibly spectrum analyzer+ t( w4 d$ P) `: z" y
readings of power supply noise. Depending on the measured results, further iterations through
the part selection and simulation steps could be necessary to optimize the PDS for the specificz5 Z/ F; }* Q: I- G5 E4 l
application. A sixth optional step is also given for cases where a perfectly optimized PDS is
needed.










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