ZT: Mentor CEO warns of soaring IC design costs - 软件编程/OS - 电子工

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Mentor CEO warns of soaring IC design costs

Chip design costs are expected to shoot up, but software—not hardware—is playing a much greater role in the problematic equation.
This is according to Mentor Graphics Corp. chairman and CEO Walden Rhines, who said that the shift in the equation will require a new type of EDA technology—embedded software automation (ESA)—as a means to attack the problem. Rhines warned that IC design costs for many devices are projected to hit the dreaded $100 million level within the next three years. Not long ago (and even today), IC design costs ranged between $20-to-$50 million. The $100 million figure "is scary" for EDA vendors, because there are fears that designers "will no longer buy tools" due to soaring IC design costs, Rhines said at the Semico Outlook Conference on Tuesday. However, EDA will remain relevant in that equation, he said. There is another way to look at the problem. For example, the total non-recurring engineering costs to develop Qualcomm Inc.'s Snapdragon chip was about $60 million, according to Alex Shubat, president and CEO of IP house Virage Logic Corp. To break even, Qualcomm must sell 6 million units at a price tag of $30 per chip, he said at the Semico event. According to Shubat, there are other factors facing chipmakers like Qualcomm: 1) finite market size; 2) exploding complexity; 3) increasing NRE costs; and 4) shrinking TAM. He said the possible net result for some is troubling: lower profits. Besides that, product life spans are shrinking to about one to two years, warned Derek Meyer, executive VP of consumer chipmaker Quartics Inc. "Lower entry costs means more competition, adding to margin pressure," he said at the Semico event. The real issue is not hardware costs, which are somewhat flat. IC design costs are soaring due to "the increasing cost of embedded software," said Mentor's Rhines. As a result, on average within various companies, software developers outnumber hardware developers by a factor of two to one, he said. There are ways to attack the software problem, giving rise to so-called ESA technology. According to the Mentor CEO, here's some enablers for ESA: software reuse, automation (Autosar), open standards for software (Linux, Android, etc). Quartics' Meyer proposed a new model, dubbed semiconductor 3.0. As part of the model, he said chipmakers could learn from Apple's iPhone, which generates several revenue streams: 1) Hardware revenue: upfront, as part of iPhone sales; 2) Services revenue: indirectly as a result of customer fees paid through AT&T; 3) Software revenue: from consumers through the sale of aftermarket applications. - <strong>Mark LaPedus
<i>EE Times</i></strong>
<strong>Keywords:</strong> chip design cost IC design software embedded EDA