我们从2011年坚守至今,只想做存粹的技术论坛。  由于网站在外面,点击附件后要很长世间才弹出下载,请耐心等待,勿重复点击不要用Edge和IE浏览器下载,否则提示不安全下载不了

 找回密码
 立即注册
搜索
查看: 458|回复: 0

ZT: Micron gears up for sub-25nm NAND technology, EZ-NAND solutions - 消费

[复制链接]

该用户从未签到

1万

主题

1292

回帖

936

积分

管理员

积分
936

社区居民最爱沙发原创达人社区明星终身成就奖优秀斑竹奖宣传大使奖特殊贡献奖

QQ
发表于 2013-3-30 00:15:51 | 显示全部楼层 |阅读模式
Micron gears up for sub-25nm NAND technology, EZ-NAND solutionsPrinter friendly
Related stories
Comments
Email to a friend
Latest news
Josephine Lien, Taipei; Jessie Shen, DIGITIMES [Tuesday 2 March 2010]
Micron Technology is set to advance its NAND flash process technology to sub-25nm nodes in 2011, and is gearing up the development of NAND memory supporting ONFI's soon-to-be available specification called EZ-NAND, according to Kevin Kilbuck, director of NAND market development for Micron.
According to Micron's NAND flash process roadmap, the company expects to enter the sub-25nm technology era in 2011 about one year after mass production of 25nm-made products in mid-2010. The memory maker also looks to develop its charge trap flash (CTF) technology, a replacement option for the current mainstream floating-gate NAND technology.
In terms of applications, Micron has offered managed NAND portfolio that supports the eMMC standard for handset and GPS navigator applications, Kilbuck said. eMMC solutions, seen as an alternative to NOR flash, provide a standard interface specification that minimizes the need for host software to accommodate process node migrations and different chipmakers' NAND flash devices.
Micron is also vying for a piece of the market for portable and consumer electronics applications. Kilbuck revealed the company's plan to introduce new NAND solutions that will feature the EZ-NAND specification. The new chips will operate more like storage media, with an 8Gb device capable of storing 2,000 songs or 7,000 photos like a DVD storage.
ONFI recently announced it has begun work on the new technology specification, which is expected to be completed in the mid-2010 timeframe. EZ-NAND is to build ECC (error checking and correction) into the NAND die rather than the system, which will remove the burden of the host controller to keep pace with the fast-changing ECC requirements of NAND technology.
回复

使用道具 举报

您需要登录后才可以回帖 登录 | 立即注册

本版积分规则

论坛开启做任务可以
额外奖励金币快速赚
积分升级了


Copyright ©2011-2024 NTpcb.com All Right Reserved.  Powered by Discuz! (NTpcb)

本站信息均由会员发表,不代表NTpcb立场,如侵犯了您的权利请发帖投诉

平平安安
TOP
快速回复 返回顶部 返回列表