lattice_fpga_demon

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Introduction The LatticeECP3™ Versa Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 Field-Programmable Gate Array. The features of the LatticeECP3 Versa Evaluation Board can assist engineers with rapid prototyping and testing of their specific designs. The LatticeECP3 Versa Evaluation Board is part of the LatticeECP3 Versa Development Kit. The guide is intended to be referenced in conjunction with demo user’s guides to demonstrate the LatticeECP3 FPGA.
Figure 1. LatticeECP3 Versa Evaluation Board, Top Side
User Switches
Status LEDs
USB Programming
J3 – JTAG Interface
J13 – JTAG Interface
On-Board Clock Management
Expansion Connectors
DDR3 Memory
SERDES Test SMA Connectors
LED Display
GSRn & PROGRAMn Push-buttons
10/100/1000 RJ-45 Connections
PCI Express x1
SPI Flash Configuration Memory
12V DC Power Input
Features • Half-length PCI Express form-factor – Allows demonstration of PCI Express x1 interconnection • Electrical testing of one full-duplex SERDES channel via SMA connections • USB-B connection for UART and device programming • Two RJ45 interfaces to 10/100/1000 Ethernet to GMII • On-board Boot Flash – 64M Serial SPI Flash • DDR3-1333 memory components (64Mb/x16) • Expansion mezzanine interconnection for prototyping • 14-segment alpha-numeric display • Switches, LEDs and displays for demo purposes • ispVM™ programming support • On-board reference clock sources
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LatticeECP3 Versa Evaluation Board User’s Guide
The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics.
Caution: The LatticeECP3 Versa Evaluation Board contains ESD-sensitive components. ESD safe practices should be followed while handling and using the evaluation board. LatticeECP3 Device This board features a LatticeECP3 FPGA with a 1.2V core supply. It can accommodate all pin-compatible LatticeECP3 devices in the 484-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the LatticeECP3 Family Data Sheet.
Note: The connections referenced in this document refer to the LFE3-35EA-8FN484C device. Applying Power to the Board The LatticeECP3 Versa Evaluation Board is ready to power on. The board can be supplied with power from a PCI Express host system or standalone with an external wall power module.
The 12V DC input power source is fused with a surface mounted fuse, as noted in Table 1.
Table 1. Board Power Supply Fuses – (See Appendix B, Figure 12)
Fuse Designator Description F1 12V Input Supply Fuse
The board may be plugged into a host PC. Only plug the board into a PCI Express slot when the system is powered off. Once inserted, the PC can be safely powered on.
Using the evaluation board outside of a PC chassis supply requires the factory-supplied wall supply module. Use of other supplies is not suggested. GME Technology’s GFP181DA-1215B-1 (or equivalent) is provided with the LatticeECP3 Versa Development Kit.
Figure 2. Power Distribution Scheme – (See Appendix B, Figure 12)
SW
3_3V, +3.3V, 1.35 A, Power Status LED D9
12_0V (5A fused) Power Status LED D13
EN
SW
SW 1_5V, +1.5V, 1.1 A, Power Status LED D11 EN
VCC_CORE, +1.2V, 1.35 A, Power Status LED D10 SW
LDO SERDES 1_2V, +1.2V, 1A, Power Status LED D12 EN 2_5V, +2.5V, 1.1 A, Power Status LED D31
Programming/FPGA Configuration The LatticeECP3 Versa Evaluation Board has a built-in download controller for programming the LatticeECP3 FPGA. The built-in module consists of a USB Type-B connector and a USB UART device. To use the built-in download cable, simply connect a standard USB cable (a USB-B to USB-A cable is included with the LatticeECP3 Versa Development Kit) from J2 to your PC (with ispVM System software installed). The USB hub on the PC will detect the addition of the USB function, making the built-in cable available for use with the ispVM System software. The USB cable is connected in parallel to J3

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