ar6004_sc_2x2_802.11_abgn_mimo_mac_bb_radio_datasheet

ar6004_sc_2x2_802.11_abgn_mimo_mac_bb_radio

Overview
The AR6004 is a single chip 2x2 802.11 a/b/g/n device, optimized for low-power embedded
applications with dual-stream capability for both transmit and receive. Frame aggregation,
reduced inter-frame spacing (RIFS) and half-guard intervals provide improved throughput on the
link. The AR6004 provides a robust communication environment, capable of supporting STBC
LDPC codes. Additional 11n performance optimizations, such as 11n frame aggregation (A
MPDU and A-MSDU) are provided by drivers that support SDIO bus transaction bundling (a
form of bus aggregation) and low-overhead host assisted buffering (RX A-MSDU and RX A
MPDU). These techniques can improve the performance and efficiency of applications involving
large bulk data transfers (for example, file transfers or high-resolution video streaming). The
typical data path consists of the host interface, mailbox DMA, advanced high-performance bus
(AHB), memory controller, MAC, baseband module (BB), and radio. The CPU drives the control
path using register and memory accesses. External interfaces include USB, HSIC (with LPM
support), SDIO or GSPI, reference clock, and front-end components as well as optional
connections such as UART, SPI/I2C, GPIO, JTAG, 32 kHz source .



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