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CANTUS 128A MCU datasheet
Features
▫ High-performance, Low-power 32-bit EISC Microprocessor
▫ 32-bit EISC Architecture
- AE32000C
- Up to 96MIPS Throughput at 96MHz
- 2 Way Set Associative cache with I-Cache(8KB) and D-Cache(4KB)
▫ Program and Data Memories
- 128KBytes , 512KBytes of Re-programmable NOR Flash
Endurance: 100,000 Erase Cycles
JTAG Programming
ISP (In System Programming)
- 80KBytes Internal SRAM
- External Static Memory Interface with ALE
▫ Peripherals
- 32-bit Watchdog Timer
- 2 External Interrupts
- 8 Channel 32-bit Timer/Counter with 15-bit Pre-scaler, Capture mode, PWM mode,
and Output Compare Mode
- 8 Channel UART with 16Bytes FIFO, Functionally compatible with the 16550
- Master/Slave SPI with 8Bytes FIFO
- Two Wire Interface
- Direct Memory Access Controller(DMAC)
- NAND Flash Controller with 4bit ECC
- I2S with ADPCM
- USB 1.1 Full Speed Device
- 53 Port In/Out
- 32.768KHz crystal oscillator for RTC
- 2MHz ~ 15MHz crystal oscillator
- Power Controller
- JTAG Debugger
▫ Special Features
- Embedded two 1.8v Voltage Regulators (LDOs)
- Power On Reset
- On-chip PLL
The PLL generates the clock to operate the overall device (including USB device).
- 14-bit Voice Codec with 4Ch Input
- Power Mode: Normal, Idle and Deep Idle mode
- Woken by PWK pin or RTC interrupt from Deep mode
▫ Operating Voltage Range
- Core: 1.8V
- I/O: 3.3V
▫ Operating frequency
- Up to 96MHz
▫ Package
- 100-pin TQFP Package
CANTUS 128A MCU datasheet.pdf
(6.85 MB, 下载次数: 0)
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